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The C7103 is an IC backside polishing system for use when preparing a sample for backside emission analysis with the Phemos Series (emission microscope) or Themos Series (thermal emission monitoring system). It is compact, easy to operate under MS Windows, and applicable to several types of packaged ICs and wafers. In recent semiconductor devices, wiring is formed in multiple layers, and components such as transistors are arranged under these metal layers. Moreover, a package structure in which a lead frame called an LOC (Lead On Chip) covers the entire surface of the chip has now come into practical use. Therefore, it has become more difficult to detect emission from the front surfaces of such semiconductor devices. |